1. Field of Invention
The present invention relates to a method and apparatus for fabricating a device having material layers stacked on a substrate. The invention also relates to the device and an electronic equipment.
2. Description of Related Art
In the related art, a photolithography technique can be used as a method for fabricating a device that has a fine wiring pattern, such as a semiconductor integrated circuit. A method for fabricating the device using an inkjet method is disclosed in JP-A-11-274671 and JP-A-2000-216330. The technique disclosed in these documents stacks the material layers on the substrate by discharging a liquid material containing a patterning material from a discharge head on a patterning surface, forms a multilayer-interconnection device, and is advantageous since it is available for a high-mix low-volume production.
In the related art, in fabricating the multilayer-interconnection device, multiple material layers are stacked by alternately disposing the liquid material on the substrate, and preparatorily drying the disposed liquid material using a hotplate or electric oven. Then, a baking treatment is performed for the substrate on which the multiple material layers were stacked, thereby forming the multilayer-interconnection device.